Gaya APA

LaMeres, B, J. (2017). Introduction toLogic Circuits& Logic Designwith Verilog (First Edition). Cham, Switzeland: Springer.

Gaya MLA

LaMeres, Brock, J.. "Introduction toLogic Circuits& Logic Designwith Verilog". First Edition Cham, Switzeland: Springer, 2017. Text.